- IEEE Robert N. Noyce Medal
Takuo Sugano has dedicated his career to strengthening the understanding of semiconductor materials to enable progress in developing advanced silicon-based electronic devices and the continued growth of the industry. During the 1960s, he tackled instability issues in silicon metal-oxide-field-effect-transistors (MOSFETs) caused by sodium contamination. Using radio-activation analysis, Sugano demonstrated the physical mechanism of prevention of sodium ions from moving in the dielectric, leading to more stability and enabling more reliable and high-performance MOSFETs. Assuming that chemical bonds between silicon and oxygen or silicon at silicon dioxide-silicon interfaces are stretched, he also proposed a novel model on the origin of the U-shaped energy distribution of density of trap state at silicon dioxide-silicon interfaces. His work on electron transport in the silicon inversion layer highlighted the effect of surface quantization of carriers in MOSFET channels at room temperature to improve the dynamic characteristics of silicon MOSFETs. The resulting improvement in performance helped move the commercial application of silicon MOSFETs beyond personal calculators. To further improve MOSFET reliability, Sugano then focused his efforts on electron and hole trapping in silicon dioxide films that were thermally grown in an ultra-dry or conventional oxidizing atmosphere on the surface of silicon substrates and the generation of interface trap states by electron or hole injection. Also important to increasing the understanding of semiconductor materials was Sugano’s role in establishment of a class-100 clean room in 1975 at the University of Tokyo at a time when clean rooms were not popular at universities. Sugano has also made pioneering contributions to III-V semiconductors, superconducting (Josephson junction) devices, and single-electron transistors. He developed an anodic oxidation process for III/V compound semiconductors in inductively coupled plasma and demonstrated its usefulness for fabricating gallium arsenide insulated-gate FETs. He also has made important contributions to plasma processes for fabrication of silicon large scale integrated circuits, including plasma etching, plasma cleaning, and plasma oxidation.
An IEEE Life Fellow and recipient of the Person of Cultural Merit award (2006) from the government of Japan, Sugano is a Professor Emeritus with the University of Tokyo, Tokyo, Japan.