Simon Deleonibus

From ETHW
Simon Deleonibus

Biography[edit source]

Simon Deleonibus’ groundbreaking achievements in micro/nano-electronics and his leadership have provided industry standard processes that have enabled the continued miniaturization of integrated circuits for today’s advanced electronics. His patented work on the “plug principle” in 1984 made multilevel interconnects possible in mass production, overcoming major yield and reliability issues encountered with classical aluminum interconnects. He developed the self-aligned damascene gate process, which enables the fine tuning of metal/High-K gate transistors’ threshold voltage for their geometry scaling in sub-32-nm nodes high-performance and system-on-chip silicon integrated circuits. With his teams, he pioneered 2D and 3D process modules using fully depleted silicon-on-insulator transistors, nanowires, and alternative memories to design for highly energy efficient miniaturization, add-on heterogeneous co-integration and new computing paradigms.

An IEEE Fellow and ECS, Deleonibus is CEA-Research-Director and chief scientist (retired) from CEA-LETI, Grenoble, France. He is the recipient of the 2005 French Academy-of-Technologies Grand-Prix.