File:ElectronicChineseAbacus.pdf

ElectronicChineseAbacus.pdf(file size: 60 KB, MIME type: application/pdf)

Title: A new construction adder based on Chinese abacus algorithm. Authors: Yi, Shu-Chung1 jerry1@url.com.tw Source: Computers & Electrical Engineering. Mar2012, Vol. 38 Issue 2, p185-193. 9p. Abstract: A new construction adder based on Chinese abacus algorithm is presented in this paper. ... The construction was simulated by the technology of TSMC 0.18μm CMOS process. Layout was also made by the same technology. The maximum delay of the 32-bit abacus adder is 0.91ns and 14% less than that of Carry Look-ahead Adders for 0.18μm technology. The power consumption of the abacus adder is 3.1mW and 28% less than that of Carry Look-ahead Adders for 0.18μm technology. ... The use of Chinese abacus approach offers a competitive technique with respect to other adders.

File history

Click on a date/time to view the file as it appeared at that time.

Date/TimeDimensionsUserComment
current11:47, 28 May 2014 (60 KB)Sks23cu (talk | contribs)Title: A new construction adder based on Chinese abacus algorithm. Authors: Yi, Shu-Chung1 jerry1@url.com.tw Source: Computers & Electrical Engineering. Mar2012, Vol. 38 Issue 2, p185-193. 9p. Abstract: A new construction adder based on Chinese abacus alg
  • You cannot overwrite this file.

The following page links to this file: