C.V. Ramamoorthy


The next generation of integrated circuitry, featuring reconfigurability, selfrepair, fault-tolerance and self-manageability relies on chips that can effectively self-test. The paper "Fault Tolerant Systems Design in VLSI Using Data Compression Under Constraints of Failure Probabilities," published in the December 2001 issue of IEEE Transactions on Instrumentation and Measurement by Sunil R. Das, Chittoor V. Ramamoorthy, Mansour H. Assaf, Emil M. Petriu and Wen-Ben Jone is a powerful reference for professionals who develop these new chips. The paper offers a lucid case for the importance of response data compaction, as well as an extensive overview of the various built-in self-test (BIST) methods available.

For more than 30 years, Chittoor V. Ramamoorthy has made important contributions to software engineering, distributed and parallel computation and computer architecture, through his research, teaching and publications. He has mentored 73 doctoral students and has published more than 200 papers and co-edited three books: Handbook on Software Engineering, Pacific Computer Communications, and Computers for AI Processing. A Life Fellow of the IEEE and a Fellow of the Society of Design and Process Science, he has served on numerous IEEE committees and received IEEE Centennial and IEEE Third Millennium Medals. He has received many major IEEE Computer Society Awards, including the Taylor Booth, Richard Merwin, and Hitachi-Kanai Awards. He has served on many advisory committees including those of the U.S. Army, Air Force and Navy; Los Alamos Labs; Lockheed Research; and IBM. He is Professor Emeritus at the University of California at Berkeley.